GATE 2024 EE – Question 25

Analog and Digital Electronics · VCOs and timers, combinatorial and sequential logic circuits, multiplexers, demultiplexers · 1 mark · Multiple choice

In the circuit, the present value of $Z$ is 1. Neglecting the delay in the combinatorial circuit, the values of $S$ and $Z$, respectively, after the application of the clock will be

(Combinatorial circuit: $S=X\oplus Y\oplus Z$ with $X=1$, $Y=0$; the D flip-flop's $D=S$, its output $Q=Z$ is fed back.)

Diagram for GATE 2024 EE question 25

$S=0,\ Z=0$
$S=0,\ Z=1$
$S=1,\ Z=0$
$S=1,\ Z=1$

Practise this question in The GATE Grind →

Show answer and explanation

Correct answer: (C) $S=1,\ Z=0$

Explanation

Before the clock, $Z=1$ so $S=1\oplus0\oplus1=0$. On the clock edge the flip-flop loads $D=S=0$, so $Z$ becomes 0. With no delay in the combinatorial circuit, $S$ immediately updates to $1\oplus0\oplus0=1$. So after the clock $S=1$ and $Z=0$.