GATE 2018 CS – Question 44
The size of the physical address space of a processor is $2^P$ bytes. The word length is $2^W$ bytes. The capacity of cache memory is $2^N$ bytes. The size of each cache block is $2^M$ words. For a $K$-way set-associative cache memory, the length (in number of bits) of the tag field is
Practise this question in The GATE Grind →
Show answer and explanation
Correct answer: (B) $P-N+\log_2K$
Explanation
The block size is $2^{M+W}$ bytes and the number of sets is $\frac{2^N}{2^{M+W}K}$. The index has $N-M-W-\log_2K$ bits and the offset has $M+W$ bits, so the tag is $P-(N-M-W-\log_2K)-(M+W)=P-N+\log_2K$ bits.