GATE 2026 CS (CS2) – Question 44
Consider a processor that has 16 general-purpose registers and uses a 2-byte instruction format for all instructions. Variable-sized opcodes are permitted. There are three instruction types: M-type, R-type, and C-type. Each M-type instruction has 2 register operands and a 6-bit immediate operand. Each R-type instruction has 3 register operands. Each C-type instruction has 1 register operand and a 6-bit offset. If there are 2 unique M-type opcodes and 7 unique R-type opcodes, what is the maximum number of unique opcodes possible for C-type instructions?
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Correct answer: (B) 4
Explanation
Each instruction is 16 bits long, and each register field needs 4 bits because there are 16 registers. An M-type instruction uses $4+4+6=14$ operand bits, so it leaves 2 bits for the opcode, allowing 4 possible 2-bit prefixes. Two of them are used by the M-type opcodes, leaving 2 prefixes. An R-type instruction uses $4+4+4=12$ operand bits, so with those remaining prefixes it effectively has 4 bits of opcode space; the 2 unused M-type prefixes expand to 8 possible 4-bit codes. Since 7 are used by R-type instructions, 1 remains. A C-type instruction uses $4+6=10$ operand bits, so this leftover prefix expands to $2^{6-4}=4$ possible 6-bit opcodes. Therefore, the maximum number of unique C-type opcodes is 4, so option (B) is correct.