GATE 2026 IN – Question 61
In the phase-locked-loop circuit shown below, the output of the VCO is a digital square wave. If the input is a square wave at 10 kHz, the steady-state frequency of the output is ________ kHz. (Rounded off to the nearest integer.)
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Correct answer: 512 to 512
Explanation
At lock, the two phase-detector input frequencies are equal. The input divider supplies $f_{in}/20=10/20=0.5\ \mathrm{kHz}$. The feedback divider supplies $f_{out}/1024$.
Equating them gives $f_{out}=1024\times0.5=$ **512 kHz**.