A half adder uses XOR and AND gates. A full adder uses two half adders and one OR gate. XOR delay is twice AND/OR delay; AND and OR each take 1.2 μs. Four full adders form a 4-bit ripple-carry adder. Find its total propagation time in μs.
XOR delay is 2.4 μs. The first stage’s worst carry path passes through XOR, AND and OR, giving 2.4+1.2+1.2=4.8 μs. Each subsequent stage’s carry-in path passes through AND and OR, adding 2.4 μs. In the source’s full-adder stage timing convention, the critical four-stage propagation is four times 4.8=19.2 μs, the published numerical answer. This is the convention used for grading; detailed sensitized carry-chain timing can be smaller.
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