GATE 2018 EC – Question 53
In the circuit shown below, the $(W/L)$ value for $M_2$ is twice that for $M_1$. The two nMOS transistors are otherwise identical. The threshold voltage $V_T$ for both transistors is 1.0 V. Note that $V_{GS}$ for $M_2$ must be $>1.0$ V.
Current through the nMOS transistors can be modeled as
$I_{DS}=\mu C_{ox}\left(\frac WL\right)\left((V_{GS}-V_T)V_{DS}-\frac12V_{DS}^2\right)$ for $V_{DS}\le V_{GS}-V_T$
$I_{DS}=\mu C_{ox}\left(\frac WL\right)(V_{GS}-V_T)^2/2$ for $V_{DS}\ge V_{GS}-V_T$
The voltage (in volts, accurate to two decimal places) at $V_x$ is ________.

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Correct answer: 0.41 to 0.43
Explanation
Both gates are at 2 V. $M_1$ has $V_{GS}=2$ V, $V_{DS}=V_x$ and is in the triode region: $I_1=k\left(V_x-\frac{V_x^2}{2}\right)$. $M_2$ has $V_{GS}=2-V_x$ and $V_{DS}=3.3-V_x\ge1-V_x$, so it is in saturation: $I_2=2k\frac{(1-V_x)^2}{2}=k(1-V_x)^2$. Equating the currents gives $1.5V_x^2-3V_x+1=0$, so $V_x=\frac{3-\sqrt3}{3}=0.42$ V.