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GATE 2024 EC – Question 17

Analog Circuits · BJT and MOSFET Amplifiers · 1 mark · Multiple choice

In the circuit below, assume that the long channel NMOS transistor is biased in saturation. The small signal trans-conductance of the transistor is $g_m$. Neglect body effect, channel length modulation and intrinsic device capacitances. The small signal input impedance $Z_{in}(j\omega)$ is ________.

Diagram for GATE 2024 EC question 17
  1. $\dfrac{-g_m}{C_1C_L\omega^2}+\dfrac1{j\omega C_1}+\dfrac1{j\omega C_L}$
  2. $\dfrac{g_m}{C_1C_L\omega^2}+\dfrac1{j\omega C_1}+\dfrac1{j\omega C_L}$
  3. $\dfrac1{j\omega C_1}+\dfrac1{j\omega C_L}$
  4. $\dfrac{-g_m}{C_1C_L\omega^2}+\dfrac1{j\omega C_1+j\omega C_L}$

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Correct answer: (A) $\dfrac{-g_m}{C_1C_L\omega^2}+\dfrac1{j\omega C_1}+\dfrac1{j\omega C_L}$

Explanation

The drain is at AC ground, so the stage is a source follower with $C_1$ between gate and source and $C_L$ from source to ground. Let $x=v_g-v_s$. The input current is $I=j\omega C_1x$ (the gate draws none). KCL at the source: $(j\omega C_1+g_m)x=j\omega C_Lv_s$. Then $v_g=x+v_s=x\,\dfrac{g_m+j\omega(C_1+C_L)}{j\omega C_L}$ and $Z_{in}=\dfrac{v_g}{I}=\dfrac{g_m+j\omega(C_1+C_L)}{-\omega^2C_1C_L}=\dfrac{-g_m}{C_1C_L\omega^2}+\dfrac1{j\omega C_1}+\dfrac1{j\omega C_L}$ (a negative resistance in series with the two capacitors).