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GATE 2025 CS (CS1) – Question 27

Computer Organization and Architecture · ALU and Control Unit Design · 1 mark · Multiple select

A partial data path of a processor is given in the figure, where RA, RB, and RZ are 32-bit registers. Which option(s) is/are CORRECT related to arithmetic operations using the data path as shown?

RA (32 bit) and a 32-bit immediate value feed Mux_A (select RA/immediate). RB (32 bit) and a 32-bit immediate value feed Mux_B (select RB/immediate). Both mux outputs feed the ALU (with ALU control), whose output goes to RZ (32 bit).
  1. The data path can implement arithmetic operations involving two registers.
  2. The data path can implement arithmetic operations involving one register and one immediate value.
  3. The data path can implement arithmetic operations involving two immediate values.
  4. The data path can only implement arithmetic operations involving one register and one immediate value.

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Show answer and explanation

Correct answer: (A) The data path can implement arithmetic operations involving two registers.; (B) The data path can implement arithmetic operations involving one register and one immediate value.; (C) The data path can implement arithmetic operations involving two immediate values.

Explanation

Each mux independently selects a register or an immediate, so all four combinations reach the ALU. Register-register, register-immediate and immediate-immediate operations are all possible, so (D) is false.