GATE Computer Organization and Architecture: ALU and Control Unit Design – Previous Year Questions
5 GATE previous year questions on ALU and Control Unit Design (Computer Organization and Architecture, Computer Science) with answers and explanations, from every paper.
- GATE 2016 CS Q43 – Consider a carry lookahead adder for adding two n-bit integers, built using gates of fan-in at most two. The time to perform addition using this adder…
- GATE 2025 CS (CS2) Q39 – For a direct-mapped cache, 4 bits are used for the tag field and 12 bits are used to index into a cache block. The size of each cache block is one…
- GATE 2025 CS (CS2) Q61 – An application executes 6.4 108 number of instructions in 6.3 seconds. There are four types of instructions, the details of which are given in the…
- GATE 2025 CS (CS1) Q27 – A partial data path of a processor is given in the figure, where RA, RB, and RZ are 32-bit registers. Which option(s) is/are CORRECT related to…
- GATE 2024 CS (CS1) Q55 – The baseline execution time of a program on a 2 GHz single core machine is 100 ns. The code corresponding to 90% of the execution time can be fully…