GATE Operating System: Memory Management and Virtual Memory – Previous Year Questions
23 GATE previous year questions on Memory Management and Virtual Memory (Operating System, Computer Science) with answers and explanations, from every paper.
- GATE 2017 CS Q50 – Recall that Belady's anomaly is that the page-fault rate may *increase* as the number of allocated frames increases. Now, consider the following…
- GATE 2016 CS Q57 – Consider a computer system with 40-bit virtual addressing and page size of sixteen kilobytes. If the computer system has a one-level page table per…
- GATE 2016 CS Q59 – Consider a computer system with ten physical page frames. The system is provided with an access sequence (a 1, a 2, , a 20, a 1, a 2, , a 20), where…
- GATE 2015 CS Q29 – Consider a system with byte-addressable memory, 32-bit logical addresses, 4 kilobyte page size and page table entries of 4 bytes each. The size of the…
- GATE 2015 CS Q57 – Consider a main memory with five page frames and the following sequence of page references: 3, 8, 2, 3, 9, 1, 6, 3, 8, 9, 3, 6, 2, 1, 3. Which one of…
- GATE 2018 CS Q20 – Consider a process executing on an operating system that uses demand paging. The average time for a memory access in the system is M units if the…
- GATE 2026 CS (CS2) Q54 – A system has a Translation Lookaside Buffer (TLB) with reach 1 MB. The paging system uses pages of size 4 KB. The virtual address space is 64 GB and…
- GATE 2026 CS (CS2) Q55 – Consider contiguous allocation of physical memory to processes using variable partitioning. There are 8 holes of sizes 20 KB, 4 KB, 25 KB, 18 KB, 7…
- GATE 2026 CS (CS1) Q54 – Consider a system that has a cache memory unit and a memory management unit (MMU) with a Translation Lookaside Buffer (TLB). Which one of the…
- GATE 2025 CS (CS2) Q47 – Consider a demand paging system with three frames, and the following page reference string: 1 2 3 4 5 4 1 6 4 5 1 3 2. The contents of the frames are…
- GATE 2025 CS (CS2) Q58 – A computer system supports a logical address space of 232 bytes. It uses two-level hierarchical paging with a page size of 4096 bytes. A logical…
- GATE 2025 CS (CS1) Q14 – Consider a demand paging memory management system with 32-bit logical address, 20-bit physical address, and page size of 2048 bytes. Assuming that the…
- GATE 2025 CS (CS1) Q54 – In optimal page replacement algorithm, information about all future page references is available to the operating system (OS). A modification of the…
- GATE 2024 CS (CS2) Q24 – Which of the following tasks is/are the responsibility/responsibilities of the memory management unit (MMU) in a system with paging-based memory…
- GATE 2024 CS (CS2) Q64 – Consider a 32-bit system with 4 KB page size and page table entries of size 4 bytes each (1 KB = 210 bytes). The OS uses a 2-level page table with an…
- GATE 2024 CS (CS1) Q62 – Consider a memory management system that uses a page size of 2 KB. Assume that both the physical and virtual addresses start from 0. Pages 0, 1, 2,…
- GATE 2023 CS Q57 – Consider the following two-dimensional array D in the C programming language, which is stored in row-major order: int D[128][128]; Demand paging is…
- GATE 2023 CS Q58 – Consider a computer system with 57-bit virtual addressing using multi-level tree-structured page tables with L levels for virtual to physical address…
- GATE 2022 CS Q38 – Which one of the following statements is FALSE?
- GATE 2022 CS Q64 – Consider a demand paging system with four page frames (initially empty) and LRU page replacement policy. For the following page reference string 7, 2,…
- GATE 2021 CS Q21 – In the context of operating systems, which of the following statements is/are correct with respect to paging?
- GATE 2020 CS Q21 – Consider allocation of memory to a new process. Assume that none of the existing holes in the memory will exactly fit the process's memory…
- GATE 2020 CS Q63 – Consider a paging system that uses 1-level page table residing in main memory and a TLB for address translation. Each main memory access takes 100 ns…