The GATE Grind

GATE Digital Circuits: Semiconductor Memories – Previous Year Questions

4 GATE previous year questions on Semiconductor Memories (Digital Circuits, Electronics and Communication Engineering) with answers and explanations, from every paper.

  1. GATE 2015 EC Q25 (1 mark, Numerical answer) – A 16 Kb (=16,384 bit) memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number of columns). The minimum…
  2. GATE 2018 EC Q42 (2 marks, Multiple choice) – A 22 ROM array is built with the help of diodes as shown in the circuit below. Here W0 and W1 are signals that select the word lines and B0 and B1 are…
  3. GATE 2021 EC Q22 (1 mark, Multiple choice) – Addressing of a 32K16 memory is realized using a single decoder. The minimum number of AND gates required for the decoder is
  4. GATE 2026 EC Q42 (2 marks, Multiple choice) – The address of the first location of a 256 kilo byte (KB) memory is (2500) H. Choose the correct address of the last location of the memory.