GATE 2015 CS (CS2) – Question 17
Find the minimum number of JK flip-flops for a synchronous counter with output sequence 0,0,1,1,2,2,3,3,0,0,… .
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Correct answer: 3
Explanation
The repeated equal outputs are distinct internal phases: after one zero the next output is zero, but after the other it is one. There are eight distinguishable phases in the cycle. Encoding them requires ceil(log₂8)=3 flip-flops; using two high bits as the displayed count yields the repetitions.