GATE 2024 BM – Question 21
The shown 2:1 multiplexer feeds Q back to input 1 and D to input 0, selected by clk. What circuit does it implement?
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Show answer and explanation
Correct answer: (A) Negative-level D latch
Explanation
When clk=0, input zero is selected and Q follows D. When clk=1, input one returns the existing Q, holding the value. Thus it is transparent during the low level and stores during the high level: a negative-level D latch, A, rather than an edge-triggered flip-flop.