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GATE 2022 BM – Question 16

Analog and Digital Electronics · Sequential Logic · 1 mark · Multiple choice

The shown logic circuit operates at 1 V. NAND and XNOR input-to-output delays are 200 ps and 400 ps respectively. At t=T, A=0,B=1,Z=0. At t=2T inputs change to A=1,B=0, producing a 1 V pulse at Z. Find pulse width in ps.

Diagram for GATE 2022 BM question 16
  1. 100
  2. 200
  3. 400
  4. 600

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Show answer and explanation

Correct answer: (B) 200

Explanation

Initially the cross-coupled NAND latch has X=1,Y=0. After A rises and B falls, Y becomes one after one NAND delay while X is initially still one. One further NAND delay later X falls to zero. The XNOR therefore sees equal inputs for two hundred picoseconds. Its four-hundred-picosecond propagation delay shifts both pulse edges equally and does not change their separation. Width is 200 ps, B.

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