GATE 2017 EE (EE2) – Question 20

For the three-input logic circuit shown, output Z is

Show answer and explanation

Correct answer: (C) $\bar Q+R$

Explanation

The upper NAND gives $\overline{P\bar Q}$ and the lower NAND gives $\overline{QR}$. The final gate NANDs these with Q.

By De Morgan, $Z=P\bar Q+\bar Q+QR$. Absorb $P\bar Q$ into $\bar Q$, then use $\bar Q+QR=\bar Q+R$.

Thus **$Z=\bar Q+R$, C**; the output is independent of P after simplification.

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