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GATE 2015 EE (EE2) – Question 47

Analog and Digital Electronics · VCOs and timers, combinatorial and sequential logic circuits, multiplexers, demultiplexers · 2 marks · Multiple choice

The sequential circuit starts at Q1Q0=00. Its state immediately after the 333rd clock pulse is

Diagram for GATE 2015 EE (EE2) question 47
  1. 00
  2. 01
  3. 10
  4. 11

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Show answer and explanation

Correct answer: (B) 01

Explanation

From the wiring, the first JK pair has J0=Q̄1,K0=Q1, making Q0,next=Q̄1. The second has J1=Q0,K1=Q̄0, making Q1,next=Q0.

The state cycle is therefore 00→01→11→10→00. Its period is four. Since 333 mod 4=1, the state is the first after 00: **01, B**.

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