GATE Analog and Digital Electronics: VCOs and timers, combinatorial and sequential logic circuits, multiplexers, demultiplexers – Previous Year Questions
27 GATE previous year questions on VCOs and timers, combinatorial and sequential logic circuits, multiplexers, demultiplexers (Analog and Digital Electronics, Electrical Engineering) with answers and explanations, from every paper.
- GATE 2017 EE Q23 – The Boolean expression AB + AC + BC simplifies to
- GATE 2017 EE Q46 – The output expression for the Karnaugh map shown below is AB \ CD 00 01 11 10 --- --- --- --- --- 00 0 0 0 0 01 1 0 0 1 11 1 0 1 1 10 0 0 0 0
- GATE 2017 EE Q47 – The logical gate implemented using the circuit shown below where, V 1 and V 2 are inputs (with 0 V as digital 0 and 5 V as digital 1) and V OUT is the…
- GATE 2015 EE Q25 – In the 4 1 multiplexer, the output F is given by F = A B. Find the required input 'I 3 I 2 I 1 I 0'.
- GATE 2015 EE Q47 – The figure shows a digital circuit constructed using negative edge triggered J-K flip flops. Assume a starting state of Q 2 Q 1 Q 0 = 000. This state…
- GATE 2015 EE Q48 – f(A, B, C, D) = M(0, 1, 3, 4, 5, 7, 9, 11, 12, 13, 14, 15) is a maxterm representation of a Boolean function f(A, B, C, D) where A is the MSB and D is…
- GATE 2016 EE Q21 – Consider the following circuit which uses a 2-to-1 multiplexer as shown in the figure below. The Boolean expression for output F in terms of A and B…
- GATE 2016 EE Q46 – The current state Q A Q B of a two JK flip-flop system is 00. Assume that the clock rise-time is much smaller than the delay of the JK flip-flop. The…
- GATE 2018 EE Q24 – In the logic circuit shown in the figure, Y is given by
- GATE 2018 EE Q46 – Which one of the following statements is true about the digital circuit shown in the figure?
- GATE 2018 EE Q47 – Digital input signals A,B,C with A as the MSB and C as the LSB are used to realize the Boolean function F=m 0+m 2+m 3+m 5+m 7, where m i denotes the…
- GATE 2019 EE Q45 – The output expression for the Karnaugh map shown below is
- GATE 2019 EE Q46 – In the circuit shown below, X and Y are digital inputs, and Z is a digital output. The equivalent circuit is a
- GATE 2020 EE Q25 – A sequence detector is designed to detect precisely 3 digital inputs, with overlapping sequences detectable. For the sequence (1,0,1) and input data…
- GATE 2020 EE Q64 – An 8085 microprocessor accesses two memory locations (2001H) and (2002H), that contain 8-bit numbers 98H and B1H, respectively. The following program…
- GATE 2021 EE Q32 – A 16-bit synchronous binary up-counter is clocked with a frequency f CLK. The two most significant bits are OR-ed together to form an output Y.…
- GATE 2021 EE Q47 – A counter is constructed with three D flip-flops. The input-output pairs are named (D 0,Q 0), (D 1,Q 1), and (D 2,Q 2), where the subscript 0 denotes…
- GATE 2022 EE Q26 – A MOD 2 and a MOD 5 up-counter when cascaded together results in a MOD counter. (in integer)
- GATE 2022 EE Q29 – The maximum clock frequency in MHz of a 4-stage ripple counter, utilizing flip-flops, with each flip-flop having a propagation delay of 20 ns, is .…
- GATE 2023 EE Q56 – Neglecting the delays due to the logic gates in the circuit shown in figure, the decimal equivalent of the binary sequence [ABCD] of initial logic…
- GATE 2023 EE Q57 – In a given 8-bit general purpose micro-controller there are following flags. C-Carry, A-Auxiliary Carry, O-Overflow flag, P-Parity (0 for even, 1 for…
- GATE 2024 EE Q24 – Simplified form of the Boolean function F(P,Q,R,S)= P Q+ PQS+P Q R S+P QR S is
- GATE 2024 EE Q25 – In the circuit, the present value of Z is 1. Neglecting the delay in the combinatorial circuit, the values of S and Z, respectively, after the…
- GATE 2024 EE Q26 – To obtain the Boolean function F(X,Y)=X Y+ X, the inputs PQRS in the figure should be (4:1 multiplexer with inputs P,Q,R,S on lines 0,1,2,3; select…
- GATE 2025 EE Q37 – A Boolean function is given as f=( u+ v+ w+ x)( u+ v+ w+x)( u+v+ w+ x)( u+v+ w+x) The simplified form of this function is represented by
- GATE 2026 EE Q45 – The digital circuit shown has 3 inputs (x, y, and z). The simplified logical expression for the output (OUT) is:
- GATE 2026 EE Q46 – The MOSFET switches shown in the circuit are ideal. Which of the following is the correct option for Boolean logical expression of the output (OUT),…