The GATE Grind

GATE 2014 EE (EE1) – Question 62

Analog and Digital Electronics · VCOs and timers, combinatorial and sequential logic circuits, multiplexers, demultiplexers · 2 marks · Multiple choice

An output device is interfaced with an 8085A 8-bit microprocessor as shown. The 3-to-8 decoder has three enable lines E₁,E₂,E₃. Find the device address.

Diagram for GATE 2014 EE (EE1) question 62
  1. 50H
  2. 5000H
  3. A0H
  4. A000H

Practise this question in The GATE Grind →

Show answer and explanation

Correct answer: (B) 5000H

Explanation

The selected decoder output2requires A15A14A13=010, contributing4000H. The enable gate requires A12=1and A11=0, contributing1000H. IO/Mmust be low and WRactive, so this is a memory-mapped write. The nominal address is **5000H,B**; lower address bits are not fully decoded in the diagram.