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GATE 2020 EE – Question 25

Analog and Digital Electronics · VCOs and timers, combinatorial and sequential logic circuits, multiplexers, demultiplexers · 1 mark · Multiple choice

A sequence detector is designed to detect precisely 3 digital inputs, with overlapping sequences detectable. For the sequence (1,0,1) and input data (1,1,0,1,0,0,1,1,0,1,0,1,1,0), what is the output of this detector?

  1. 1,1,0,0,0,0,1,1,0,1,0,0
  2. 0,1,0,0,0,0,0,1,0,1,0,0
  3. 0,1,0,0,0,0,0,1,0,1,1,0
  4. 0,1,0,0,0,0,0,0,1,0,0,0

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Correct answer: (B) 0,1,0,0,0,0,0,1,0,1,0,0

Explanation

The detector outputs 1 every time the last three inputs are 1, 0, 1, and overlapping occurrences are allowed. In the input stream this pattern is completed three times: at the 4th bit (1,0,1 at bits 2-4), at the 10th bit (bits 8-10) and at the 12th bit (bits 10-12, overlapping the previous one). Option B is the output whose 1s appear only at these detections.