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GATE 2025 CS (CS1) – Question 36

Computer Organization and Architecture · Memory Interfacing and Hierarchy · 2 marks · Multiple choice

Consider a memory system with 1M bytes of main memory and 16K bytes of cache memory. Assume that the processor generates 20-bit memory address, and the cache block size is 16 bytes. If the cache uses direct mapping, how many bits will be required to store all the tag values? [Assume memory is byte addressable, 1K=$2^{10}$, 1M=$2^{20}$.]

  1. $6 \times 2^{10}$
  2. $8 \times 2^{10}$
  3. $2^{12}$
  4. $2^{14}$

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Correct answer: (A) $6 \times 2^{10}$

Explanation

The offset is 4 bits and there are 16K/16 = 2^10 lines, so the index is 10 bits. The tag is 20-10-4 = 6 bits, and the total is 6 × 2^10 bits.