GATE 2025 CS (CS1) – Question 53

Computer Organization and Architecture · Memory Interfacing and Hierarchy · 2 marks · Numerical answer

A computer has a memory hierarchy consisting of two-level cache (L1 and L2) and a main memory. If the processor needs to access data from memory, it first looks into L1 cache. If the data is not found in L1 cache, it goes to L2 cache. If it fails to get the data from L2 cache, it goes to main memory, where the data is definitely available. Hit rates and access times of various memory units are shown in the figure. The average memory access time in nanoseconds (ns) is ________. (rounded off to two decimal places)

L1 cache: hit rate 95%, access time 10 ns. L2 cache: hit rate 85%, access time (including L1 cache miss penalty) 20 ns. Main memory: access time (including L1 and L2 cache miss penalty) 200 ns.

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Correct answer: 11.85

Explanation

AMAT = 0.95·10 + 0.05·(0.85·20 + 0.15·200) = 9.5 + 0.05·47 = 11.85 ns.