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GATE 2023 EC – Question 62

Digital Circuits · Data Converters · 2 marks · Numerical answer

A sample and hold circuit is implemented using a resistive switch and a capacitor with a time constant of 1 μs. The time for the sampling switch to stay closed to charge a capacitor adequately to a full scale voltage of 1 V with 12-bit accuracy is ________ μs (rounded off to two decimal places).

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Correct answer: 8.28 to 8.36

Explanation

The capacitor voltage is $V(1-e^{-t/\tau})$. For 12-bit accuracy the remaining error must be below one LSB, i.e. $e^{-t/\tau}\le2^{-12}$. So $t=\tau\ln2^{12}=1\ \mu\text{s}\times12\ln2=8.32\ \mu$s.