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GATE 2023 EC – Question 63

Digital Circuits · Sequential Circuits · 2 marks · Numerical answer

In a given sequential circuit, initial states are $Q_1=1$ and $Q_2=0$. For a clock frequency of 1 MHz, the frequency of signal $Q_2$ in kHz, is ________ (rounded off to the nearest integer).

Diagram for GATE 2023 EC question 63

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Correct answer: 250

Explanation

From the figure, $D_1=Q_2$ (wire from the second flip-flop output back to $D_1$) and $D_2=\overline{Q_1}$. Starting at $(Q_1,Q_2)=(1,0)$: next $(D_1,D_2)=(0,0)$ gives $(0,0)$; then $(0,1)$; then $(1,1)$; then $(1,0)$ again. The cycle is $10\to00\to01\to11\to10$, of length 4, with $Q_2$ high for 2 clocks and low for 2. Its frequency is $1\text{ MHz}/4=250$ kHz.