GATE 2012 CS (CS1) – Question 64
A computer has a 256 KB, four-way set-associative, write-back data cache, 32-byte blocks and 32-bit addresses. Every tag-directory entry includes the address tag, two valid bits, one modified bit and one replacement bit. How many address-tag bits are needed?
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Correct answer: (C) 16
Explanation
The cache has 2¹⁸/2⁵=2¹³ lines and 2¹¹ sets because four lines share each set. Address offset is five bits and set index eleven. The remaining tag width is 32−5−11=16 bits, C.