GATE 2016 EC (EC3) – Question 54
In the shown circuit, NOR, multiplexer and inverter delays are 2 ns, 1.5 ns and 1 ns respectively. Inputs P,Q,R,S,T are applied simultaneously. The maximum propagation delay in ns is ________.
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Show answer and explanation
Correct answer: 6.0 to 6.0
Explanation
A path must be selectable through both multiplexers. For T=0 the first MUX selects NOR(Q,R), while the second, selected by the complement of T, passes the first MUX output directly. This data delay is 2+1.5+1.5=5 ns.
For T=1 the first MUX selects the inverted S signal, and the second selects the NOR of P and that output. This delay is 1+1.5+2+1.5=**6 ns**.
The apparent 7 ns path through both NOR gates cannot be sensitized: the select conditions needed for those two choices conflict. Hence the maximum functional path delay is 6 ns.