GATE 2019 EC – Question 63

Digital Circuits · Combinatorial Circuits · 2 marks · Numerical answer

A CMOS inverter, designed to have a mid-point voltage $V_I$ equal to half of $V_{dd}$, as shown in the figure, has the following parameters:

$V_{dd}=3$ V

$\mu_nC_{ox}=100\ \mu\text{A/V}^2$; $V_{tn}=0.7$ V for nMOS

$\mu_pC_{ox}=40\ \mu\text{A/V}^2$; $|V_{tp}|=0.9$ V for pMOS

The ratio of $\left(\frac WL\right)_n$ to $\left(\frac WL\right)_p$ is equal to ________ (rounded off to three decimal places).

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Correct answer: 0.21 to 0.24

Explanation

At the mid-point $V_{in}=V_{out}=\frac{V_{dd}}{2}=1.5$ V both devices are in saturation with equal currents: $\frac12(100)\left(\frac WL\right)_n(1.5-0.7)^2=\frac12(40)\left(\frac WL\right)_p(1.5-0.9)^2$. So $64\left(\frac WL\right)_n=14.4\left(\frac WL\right)_p$, giving the ratio $0.225$.