The GATE Grind

GATE 2019 CS – Question 11

Computer Organization and Architecture · Memory Interfacing and Hierarchy · 1 mark · Multiple choice

A certain processor uses a fully associative cache of size 16 kB. The cache block size is 16 bytes. Assume that the main memory is byte addressable and uses a 32-bit address. How many bits are required for the Tag and the Index fields respectively in the addresses generated by the processor?

  1. 24 bits and 0 bits
  2. 28 bits and 4 bits
  3. 24 bits and 4 bits
  4. 28 bits and 0 bits

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Correct answer: (D) 28 bits and 0 bits

Explanation

The block offset needs $\log_216=4$ bits. A fully associative cache has no index, so the index is 0 bits and the tag is the remaining $32-4=28$ bits.