GATE 2014 CS (CS3) – Question 53

A five-stage instruction pipeline has stages IF, ID/RF, EX, MEM, WB with latencies 1,2.2,2,1,0.75 ns. ID/RF is split into ID,RF1,RF2, each 2.2/3 ns, and EX into EX1,EX2, each 1 ns, making eight stages. A program has 20% branch instructions, computing the next instruction pointer at the end of EX in the old pipeline and EX2 in the new. After fetching a branch, IF stalls until that pointer is computed. Other instructions average CPI = 1 in both designs. Execution times are P and Q ns for old and new designs. Find P/Q.