The GATE Grind

GATE 2014 EC (EC2) – Question 20

Electronic Devices · P-N Junction and Semiconductor Devices · 1 mark · Multiple choice

Shallow P-well or N-well regions in CMOS technology can be formed using ______.

  1. low-pressure chemical vapour deposition
  2. low-energy sputtering
  3. low-temperature dry oxidation
  4. low-energy ion implantation

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Correct answer: (D) low-energy ion implantation

Explanation

Ion implantation places dopant atoms at a depth controlled by their incident energy. Lower implantation energy produces shallower penetration, enabling shallow P-well or N-well regions. Thus **low-energy ion implantation,D** fits. Deposition, sputtering and oxidation do not themselves produce the required controlled subsurface dopant distribution.