The GATE Grind

GATE 2026 EE – Question 28

Power Electronics · Static V-I characteristics and firing/gating circuits for Thyristor, MOSFET, IGBT · 1 mark · Multiple choice

Consider the circuit shown in Figure (a). A gate pulse $v_g$ is applied between time instants $t_0$ and $t_1$. After $t_1$, during the MOSFET turn OFF process, it experiences a voltage overshoot.

Based on the $v_{ds}$ waveforms shown in Figure (b), which one of the following options is correct?

Diagram for GATE 2026 EE question 28
  1. $R_1>R_2>R_3$
  2. $R_1>R_3>R_2$
  3. $R_3>R_2>R_1$
  4. $R_2>R_3>R_1$

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Show answer and explanation

Correct answer: (B) $R_1>R_3>R_2$

Explanation

The voltage overshoot at turn-off grows with the resistance $R_f$ of the freewheeling path: the larger the resistance, the larger the peak of $v_{ds}$. In Figure (b) the curve labelled $R_1$ has the highest peak, then $R_3$, then $R_2$. So $R_1>R_3>R_2$.