GATE 2016 EC (EC2) – Question 26
The transistor geometries of a CMOS inverter meet worst-case charge and discharge time requirements for load C. Convert it into the shown NOR circuit in the same technology with similar worst-case times for the same C. All channel lengths remain unchanged. Which statement is correct?
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Correct answer: (B) Double PMOS widths and leave NMOS widths unchanged.
Explanation
The NOR pull-up has two PMOS transistors in series. With unchanged dimensions, its conducting resistance would be twice that of the inverter PMOS.
Doubling each PMOS width halves each resistance, making the series total equal to the original pull-up resistance. In the worst discharge case only one parallel NMOS conducts, so its width should match the inverter NMOS. Hence **B**.