The GATE Grind

GATE 2017 EC – Question 25

Digital Circuits · Sequential Circuits · 1 mark · Multiple choice

In the latch circuit shown, the NAND gates have non-zero, but unequal propagation delays. The present input condition is: $P = Q = $ '0'. If the input condition is changed simultaneously to $P = Q = $ '1', the outputs X and Y are

Two cross-coupled NAND gates. Input P drives the upper gate with output X, and input Q drives the lower gate with output Y. Each output is fed back to the other gate.
  1. $X = $ '1', $Y = $ '1'
  2. either $X = $ '1', $Y = $ '0' or $X = $ '0', $Y = $ '1'
  3. either $X = $ '1', $Y = $ '1' or $X = $ '0', $Y = $ '0'
  4. $X = $ '0', $Y = $ '0'

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Correct answer: (B) either $X = $ '1', $Y = $ '0' or $X = $ '0', $Y = $ '1'

Explanation

With $P = Q = 0$ both NAND outputs are 1. When both inputs go to 1 together, each gate sees the other gate's output as 1, so both would try to go to 0, and then back to 1. Because the delays are unequal, one gate switches first and forces the other to stay at 1. The latch settles in one of the two stable states, either $X = 1, Y = 0$ or $X = 0, Y = 1$.