The GATE Grind

GATE 2017 EC – Question 54

Digital Circuits · Sequential Circuits · 2 marks · Numerical answer

A 4-bit shift register circuit configured for right-shift operation, i.e. $D_{in} \rightarrow A$, $A \rightarrow B$, $B \rightarrow C$, $C \rightarrow D$, is shown. If the present state of the shift register is $ABCD = 1101$, the number of clock cycles required to reach the state $ABCD = 1111$ is ________.

A 4-bit shift register with stages A, B, C and D. An exclusive-OR gate takes the outputs of A and D and feeds the result back to $D_{in}$.

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Correct answer: 10

Explanation

The feedback gives $D_{in} = A \oplus D$. Starting at 1101, each clock shifts right and brings in the new bit. The states go 1101, 0110, 0011, 1001, 0100, 0010, 0001, 1000, 1100, 1110, 1111. That reaches 1111 after 10 clock cycles.