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GATE 2026 EC – Question 35

Digital Circuits · Sequential Circuits · 1 mark · Numerical answer

The negative edge triggered JK flip-flop in the Figure has J and K inputs tied to Logic High and a square wave of 10 cycles/second is applied to its clock (C) input. The frequency of the output Q (in cycles/second) is ________. (rounded off to two decimal places)

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Correct answer: 4.97 to 5.03

Explanation

With J=K=1 the flip-flop toggles on every falling clock edge, so Q completes one cycle every two clock cycles. The frequency is 10/2 = 5.00 cycles/s.